AI Agent Designs RISC-V Crypto Accelerator SoC, Hinting at a Faster Future for Custom Chip Development
Chip design has long been one of the most complex and time-consuming jobs in the technology industry. Creating a working system-on-chip requires deep semiconductor expertise, expensive electronic design automation tools, and a long chain of verification, layout, routing, and manufacturing preparation steps. But a recent experiment involving Meta’s Muse AI agent suggests that artificial intelligence could dramatically speed up parts of this process.
A semiconductor expert known online as bubble boi says Meta’s Muse AI agent was used to help design a crypto-focused system-on-chip based on the open RISC-V architecture. The project reportedly advanced all the way through place and route using OpenROAD and produced a final GDS file, the digital layout blueprint that can be used in the chip manufacturing process.
That is a major milestone because place and route is one of the most important stages of chip design. It involves positioning the chip’s logic cells and creating the metal interconnects that allow different parts of the silicon to communicate. Producing a completed GDS file means the design has moved beyond theory and into a layout format closer to what a fabrication facility would need for production.
The custom RISC-V SoC was built with blockchain and cryptographic workloads in mind. According to the project details, the crypto accelerator includes support for several widely used cryptographic algorithms, including SHA-256, SHA-512, Keccak, Ed25519, and secp256k1 field arithmetic. These are important for hashing data, verifying digital signatures, and powering many blockchain-related operations.
The reported specifications are notable for an AI-assisted chip design project. The chip includes around 61,590 logic cells and is designed to run at 100 MHz. It also reportedly achieved timing closure with roughly 4.5 nanoseconds of slack, meaning the design had room to meet its performance target reliably. Power usage was estimated at just 20 milliwatts.
The design also passed Design Rule Check, a crucial step that confirms the layout follows manufacturing constraints and does not contain physical or electrical violations that would prevent fabrication. In addition, the processor reportedly passed official RISC-V compliance testing, along with floating-point validation through ACT suites and 1.5 million Berkeley TestFloat vectors.
Perhaps the most striking detail is the cost estimate. The AI agent reportedly used around 100 million tokens to complete the work, placing the estimated compute cost at roughly $2,000. If accurate, that figure highlights why AI-assisted semiconductor design is attracting growing attention. Traditional chip development can cost enormous sums and require large engineering teams, while AI agents may eventually allow smaller teams to move faster through early design and validation stages.
The project is not finished yet. The next planned steps include adding vector instructions, removing the third-party core used as a baseline, and adapting the chip to run the Thru blockchain natively. The goal is to create a highly optimized hardware platform with a custom memory map designed specifically for that blockchain.
Thru is described as a high-performance Layer-1 blockchain capable of running programs written in common programming languages such as C and Rust. By tailoring the RISC-V SoC to the blockchain’s needs, the developer hopes to create a chip that can run the network with much higher efficiency and speed than general-purpose hardware.
The next major hurdle is manufacturing. The expert is now looking for a multi-project wafer run, a shared silicon production process where multiple chip designs are fabricated on the same wafer. This approach is often used by researchers, startups, and small teams because it is far cheaper than booking an entire wafer for one design. If the project reaches tape-out, it could become a real-world test of how far AI-assisted chip design can go.
Still, the broader field remains in its early stages. NVIDIA and ChipAgents recently introduced Build-A-Chip-Bench, a benchmark designed to test whether AI agents can autonomously design complete chips. The best-performing AI agent in that benchmark reportedly scored only 16.6 percent, showing that today’s systems still struggle with the full complexity of semiconductor engineering.
That contrast is important. While this RISC-V crypto accelerator project is impressive, it does not mean AI can already replace human chip designers. Semiconductor development requires architecture planning, verification, physical design, timing analysis, power optimization, manufacturing knowledge, debugging, and many other specialized skills. AI agents can assist with parts of the workflow, but fully autonomous chip design remains a difficult challenge.
Even so, this experiment points toward a compelling future. If AI tools continue to improve, custom chip design could become faster, cheaper, and more accessible. Instead of relying only on large semiconductor companies, smaller teams may one day create highly specialized processors for blockchain, artificial intelligence, encryption, networking, robotics, and edge computing.
The RISC-V architecture is especially important in this shift. Because it is open and flexible, RISC-V gives developers more freedom to build custom processors for specific workloads. Combined with AI agents, open-source design tools, and shared manufacturing options, RISC-V could help unlock a new wave of application-specific chips.
For now, the AI-designed crypto accelerator remains an early but promising example. It shows that artificial intelligence can meaningfully contribute to chip layout and design workflows, even if human expertise is still essential. If projects like this continue to mature, the semiconductor industry could be moving toward an era where custom silicon is no longer limited to the biggest players.
