A European chip research team in Barcelona is taking an early but meaningful step toward what it calls “sovereign infrastructure” for future supercomputing. The Barcelona Zettascale Lab (BZL) says it has completed an experimental version of its Cinco Ranch TC1 chip, a project built around the open-source RISC-V instruction set and manufactured using an Intel process technology.
The lab reports that it has successfully booted Linux in a stable way and confirmed the chip hits its expected clock speeds, a milestone that signals the design is maturing beyond theory and into practical, working silicon. According to BZL, the TC1 reaches 1.25 GHz and uses a three-core layout that’s meant to explore a more workload-specific approach to performance.
Instead of following the familiar big-core/little-core split seen in many mainstream processors, the TC1 uses what BZL describes as a “tenary” heterogeneous architecture. In simple terms, it combines three distinct RISC-V CPU cores on one chip, with each core designed for a different type of computing task. The three microarchitectures are:
Sargantana, aimed at efficiency-focused workloads
Lagarto Ka, tuned for vector-heavy workloads
Lagarto Ox, designed for scalar processing
The goal is extreme granularity in how workloads are handled—matching the right kind of core to the right kind of job. In the long run, this kind of targeted design could potentially deliver strong results in specific tasks where specialization matters, although it’s too early to claim real-world advantages over established commercial chips.
On the manufacturing side, BZL says TC1 was developed in partnership with Intel and uses the Intel 3 process node. The lab also ran evaluation tests using TSMC’s N7 node to validate the quality, feasibility, and robustness of its RTL design work. While this doesn’t mean BZL is about to ship a mainstream processor, it does show the project is being approached with serious engineering methods and cross-node verification.
For Europe’s broader ambitions in AI and high-performance computing, work like this is significant because it focuses on building homegrown supercomputing technologies rather than relying entirely on external architectures and platforms. The TC1 is still an experimental chip, but it represents a clear “first step” toward having more independent options for future computing infrastructure.
