AMD is gearing up to revolutionize the consumer GPU market with innovative plans involving multi-chiplet designs. This ambitious shift is based on recently surfaced rumors and patent filings that suggest AMD is poised to tackle the limitations of traditional monolithic graphics designs by embracing Multi-Chiplet Modules (MCM).
With multi-chiplet designs, AMD aims to address the challenges posed by latency—a major concern for gaming GPUs that rely on swift data processing. The company has apparently developed a solution, as detailed in a new patent centered around a “smart switch” data-fabric circuit. This technology seeks to optimize communication between compute chiplets and memory controllers, akin to but refined from AMD’s Infinity Fabric. By deciding between task migration and data replication with nanosecond precision, this approach could significantly enhance memory access efficiency.
Furthermore, the patent hints at employing L1 and L2 caches alongside a shared L3 cache, providing quicker access to frequently used data without heavily relying on global memory. The integration of stacked DRAM underpins this MCM design, paving the way for an efficient data-sharing ecosystem among chiplets.
AMD’s readiness to implement this technology is supported by their collaboration with TSMC, using InFO-RDL bridges and a specialized version of Infinity Fabric for die packaging. The potential merges of gaming and AI architectures under the UDNA framework reflect AMD’s strategy to unify their software ecosystem, making driver and compiler development more streamlined.
This initiative positions AMD to potentially lead the industry away from monolithic constraints. Despite the challenges experienced with previous generations, such as RDNA 3’s latency issues, the proposed multi-chiplet solution and the shared L3 cache may resolve these setbacks. While this architectural innovation is eagerly anticipated, enthusiasts might have to wait until the introduction of UDNA 5 to see these advancements in action.
