CXMT’s bold 4F² DRAM claim faces skepticism as analysts question its real-world impact
Chinese memory chipmaker CXMT has drawn attention with an ambitious claim: it says it can “leapfrog” established DRAM leaders Samsung, SK hynix, and Micron by as much as two years using a 4F² memory cell design. But according to analysts, the announcement may sound more disruptive than it really is.
The company’s president, Dr. Cao Kanyu, recently discussed plans to manufacture DRAM chips using a 4F² architecture, a design that can reduce the physical area of a memory cell by changing how key components are arranged. On paper, this could allow CXMT to improve density, reduce power consumption, and boost performance. In practice, however, analysts argue that the technology comes with serious manufacturing challenges, especially when produced using older lithography equipment.
Rosenblatt analysts reportedly described CXMT’s announcement as a “paper tiger,” suggesting that the claim may look threatening but lacks the practical strength to challenge the current DRAM leaders in the near term. Bank of America offered a similar view, arguing that CXMT’s interest in 4F² is likely driven less by technological superiority and more by necessity.
The main issue is lithography. CXMT does not have access to the most advanced EUV chipmaking machines, which are essential for producing leading-edge semiconductor nodes. Without EUV tools, the company must rely on older DUV lithography systems. Analysts believe this limitation has pushed CXMT toward 4F² as an alternative way to shrink memory cells and increase density.
To understand why this matters, it helps to look at how DRAM cells work. A DRAM memory cell typically stores one bit of data using a transistor and a capacitor, a structure often called 1T1C. The capacitor holds the electrical charge that represents data, while the transistor controls access to that charge. Bit lines move data in and out of the cell, and word lines switch the transistor on or off.
For years, the standard DRAM cell layout has been known as 6F². This design places transistors and other components in a staggered arrangement between bit lines and word lines. The 4F² approach aims to shrink the cell area by stacking certain elements more vertically, including bit line contacts, capacitors, and transistors. By doing this, the overall cell footprint can theoretically be reduced by up to 50% compared with traditional layouts.
That sounds like a major breakthrough, but the challenge is not simply designing a smaller DRAM cell. The real difficulty lies in manufacturing it reliably, at scale, and at a competitive cost.
Advanced DRAM manufacturers such as Samsung, SK hynix, and Micron have already spent years researching 4F² concepts. According to analysts, these companies have not rushed the technology into mass production because the architecture introduces major complications. Tight packing of capacitors and transistors can make cell structures more fragile. It can also lead to lower manufacturing yields, higher costs, and longer qualification times with customers.
In the semiconductor industry, yield is everything. A technology that looks impressive in a lab can become commercially unattractive if too many chips fail during production. This is one reason why the largest memory manufacturers have continued refining 6F²-based designs for DDR4, DDR5, and high-bandwidth memory rather than fully shifting to 4F².
Bank of America noted that the 6F² architecture has remained the industry standard for more than a decade. It is widely used across mainstream DRAM products, including the memory powering servers, PCs, smartphones, and AI infrastructure. The leading DRAM makers are now operating on advanced 10-nanometer-class process technologies, while CXMT’s 4F² products are expected to be built using a 15-nanometer process.
That difference is important. A more advanced manufacturing node can reduce the half pitch of memory structures, meaning the distance between repeating features such as bit lines can be made smaller. This improves density without necessarily requiring a complete change in cell architecture. Since CXMT cannot use EUV systems to push its process technology as aggressively, 4F² may be its workaround.
Rosenblatt’s view is that this workaround does not automatically give CXMT an advantage. The firm argues that 4F² becomes especially difficult below the 10-nanometer level and may not deliver meaningful cost benefits. In other words, while CXMT may be pursuing a technically interesting path, it does not guarantee that the company can outperform the established DRAM giants.
Still, analysts are not dismissing CXMT entirely. Bank of America warned that if CXMT can successfully manufacture 4F² DRAM in high volumes by 2027 or 2028, and if Samsung, SK hynix, and Micron remain focused on 6F², the Chinese company could become a more serious competitive threat. The risk would be greater if CXMT manages to overcome yield problems and deliver commercially viable products at scale.
There are also signs that China’s domestic semiconductor equipment ecosystem is trying to support this goal. CXMT’s equipment partner Naura has reportedly demonstrated technologies that could help enable vertically stacked memory production. If these tools mature, they may improve CXMT’s chances of turning its 4F² roadmap into a real manufacturing capability.
For now, however, the market appears divided between ambition and execution. CXMT’s 4F² DRAM plan highlights China’s determination to reduce dependence on foreign memory suppliers and accelerate domestic chip development. But the path from announcement to mass production is extremely difficult, especially in an industry where the biggest players have decades of experience, deep patent portfolios, advanced equipment access, and mature customer relationships.
The broader DRAM market is also undergoing a major shift because of artificial intelligence. Demand for high-performance memory, especially server DRAM and high-bandwidth memory, is rising rapidly as AI data centers expand. This structural growth could benefit Samsung, SK hynix, and Micron even if new competitors emerge. Analysts suggest that recent concerns around memory stocks may be overdone, particularly given the long-term demand created by AI workloads.
CXMT’s 4F² claim is therefore important, but it should be viewed with caution. The architecture has the potential to reduce cell area and improve density, but it is not a simple shortcut around the limits of advanced chip manufacturing. Without EUV lithography, CXMT may be forced to rely on more complex design strategies, and those strategies bring their own cost, yield, and reliability challenges.
The company’s progress will be worth watching over the next several years. If CXMT can prove that 4F² DRAM can be manufactured reliably at volume, it could reshape parts of the memory market. Until then, analysts believe the world’s top DRAM makers remain well ahead, and CXMT’s bold promise remains more of a future possibility than an immediate threat.
