Samsung Bets on Glass Interposers as TSMC Ramps Up Advanced Packaging Capacity

Samsung Develops Glass Interposer Technology to Cut Advanced Chip Packaging Costs

Samsung Electronics and Samsung Display are reportedly working together on a next-generation glass interposer that could make advanced semiconductor packaging more affordable. The project is aimed at high-performance chips used in artificial intelligence, data centers, advanced computing, and other demanding applications where packaging technology is becoming just as important as the chip itself.

Interposers play a key role in modern chip packaging. They act as a bridge between multiple chip components, helping them communicate quickly and efficiently inside a single package. This is especially important for advanced processors, AI accelerators, and high-bandwidth memory systems, where performance depends on moving huge amounts of data with minimal delay.

Today, the industry largely relies on silicon-based interposers and redistribution layer packaging technologies for premium chips. These solutions deliver strong performance, but they can be expensive and complex to manufacture. Samsung’s glass interposer approach could offer a more cost-effective alternative while still supporting the high-speed connections required for next-generation semiconductors.

According to the report, Samsung Electronics is collaborating with Samsung Display because of the display division’s experience in handling glass substrates. That expertise could be valuable as the company explores how glass can be used in advanced chip packaging. Glass has several potential advantages, including excellent flatness, stability, and the ability to support large panel-level manufacturing methods.

If Samsung can successfully develop the technology, glass interposers may help reduce production costs while improving scalability. This could be important as demand for AI chips and high-performance computing hardware continues to grow rapidly. Companies developing advanced processors are increasingly looking for packaging methods that can support higher bandwidth, better energy efficiency, and larger multi-chip designs without causing costs to rise too sharply.

The timing is also significant. The global semiconductor industry is investing heavily in advanced packaging capacity as chipmakers seek new ways to improve performance beyond traditional transistor scaling. Packaging technologies such as CoWoS-style systems and RDL interposers have become crucial for AI accelerators and other cutting-edge chips. Samsung’s glass-based alternative could become part of this broader race to build faster, more efficient, and more affordable chip packages.

Prototypes of Samsung’s glass interposer technology could reportedly be ready by the end of this year. While commercial adoption may still take time, early samples would represent an important step toward validating the design and manufacturing process. The company will need to prove that glass interposers can meet strict requirements for reliability, thermal performance, signal integrity, and mass production.

For Samsung, the development could strengthen its position in the advanced semiconductor packaging market. The company is already competing aggressively in memory, foundry services, and chip manufacturing. A successful glass interposer platform would give Samsung another tool to attract customers building next-generation AI and high-performance computing chips.

The move also highlights a major shift in the chip industry. As traditional chipmaking becomes more challenging and costly, advanced packaging is emerging as a key battleground. Instead of relying only on smaller process nodes, companies are combining multiple chiplets, memory stacks, and specialized components into a single powerful package.

Samsung’s work on glass interposers suggests that the future of chip innovation may depend not only on what happens inside the silicon, but also on how chips are connected, packaged, and manufactured at scale. If the technology delivers on its promise, it could help lower the cost of high-performance chips and accelerate the next wave of AI computing hardware.