Intel Diamond Rapids Xeon 7 CPU spotted with 32 cores, 240 MB L3 cache, and 18A-P process technology
Intel’s next-generation Diamond Rapids “Xeon 7” processor has surfaced in an early reference platform listing, giving a fresh look at what the company is preparing for its future data center CPU lineup. The chip appears to be an engineering sample built on Intel’s enhanced 18A-P process technology, and even in this early form, it points to a major step forward for Intel’s server roadmap.
Diamond Rapids is expected to play a key role in Intel’s next wave of data center products. The upcoming Xeon 7 family is designed to scale far beyond today’s offerings, with configurations reportedly reaching up to 192 cores. The platform is also expected to support PCIe Gen6 and 16-channel memory, two important upgrades for servers handling artificial intelligence, cloud computing, high-performance computing, and large enterprise workloads.
The newly spotted chip was found on Intel’s Johnson City reference evaluation platform, which is tied to the broader Oakstream server platform. This platform is being used to test Diamond Rapids Xeon 7 processors ahead of their official launch.
According to the listing, the early Diamond Rapids-P CPU features 32 cores, a clock speed of 1.1 GHz, 64 MB of L2 cache, and a large 240 MB of L3 cache. Since this is an engineering sample, the low clock speed is expected and should not be viewed as representative of final retail performance. Early silicon is typically tested at conservative frequencies while validation work continues.
What makes this discovery especially interesting is the use of Intel’s 18A-P process technology. Intel 18A-P is an improved version of the company’s 18A node and is designed to offer better performance and efficiency while keeping compatibility with existing 18A design rules. This means Intel can reuse design flows and intellectual property while still delivering meaningful gains.
Intel has previously stated that 18A-P can deliver around 9% higher performance at the same power or up to 18% lower power at the same performance compared with 18A, based on testing of a standard ARM core sub-block. The node continues to use gate-all-around transistor technology and backside power delivery, two major elements in Intel’s advanced manufacturing strategy.
Another major feature of 18A-P is Power Boost technology, which uses a dual-contact architecture enabled by PowerVia backside power delivery for both NMOS and PMOS transistors. In simple terms, this is designed to improve power delivery and performance without requiring a larger chip footprint, which is especially important for power-limited server environments.
The Johnson City reference platform reportedly supports processors with power limits of up to 650W. Diamond Rapids will be part of the Oakstream platform, which is expected to use a massive LGA 9324 socket. This shows that Intel is preparing Diamond Rapids for high-end data center deployments where power, memory bandwidth, I/O expansion, and core density are all critical.
The 240 MB L3 cache figure is also notable. While not the highest cache amount seen in modern server processors, it is still a significant number for a 32-core engineering sample. Intel has already offered server chips with up to 288 MB of cache in the Granite Rapids generation, so higher-cache Diamond Rapids configurations may appear later depending on product segmentation.
Diamond Rapids will enter a highly competitive market. AMD’s Zen 6-based EPYC Venice and Verano server processors are expected to bring up to 256 cores and will be manufactured on TSMC’s 2nm-class technology. These chips are aimed directly at the same data center customers Intel wants to win back or retain.
AMD has gained strong momentum in enterprise and cloud servers, helped by high core counts, strong efficiency, and competitive platform capabilities. Its next EPYC generation is expected to continue that trend, with broad adoption anticipated from hyperscalers, cloud providers, and AI-focused infrastructure customers.
For Intel, Diamond Rapids is more than just another Xeon release. It is an important test of the company’s ability to combine its latest manufacturing technology with a competitive server architecture. The Xeon 7 family will need to deliver meaningful improvements in performance per watt, memory bandwidth, I/O capability, and total platform value if Intel wants to challenge AMD’s growing presence in the data center market.
At the same time, Intel is looking beyond Diamond Rapids as well. The generation after Diamond Rapids, known as Coral Rapids, is expected to bring additional architectural changes, including the return of SMT support. That suggests Intel’s long-term server strategy is not limited to one product cycle, but Diamond Rapids still needs to prove that Intel’s roadmap is moving in the right direction.
For now, the appearance of a 32-core Diamond Rapids Xeon 7 engineering sample is a promising sign that Intel’s 18A-P process is advancing and that early validation is underway. While final specifications, clock speeds, pricing, and launch timing remain unknown, this early listing gives the industry a first real glimpse of Intel’s next major data center CPU family.
If Intel can execute well, Diamond Rapids could become a crucial product for the company’s server comeback. But with AMD preparing powerful Zen 6 EPYC processors and the data center market becoming increasingly driven by AI, cloud, and high-performance workloads, the battle for next-generation server CPUs is only getting more intense.
