Google may be preparing a major shift in how it builds its next wave of AI accelerator hardware. According to a new supply-chain report, Google’s upcoming TPUv8e chip is expected to use Intel Foundry’s advanced EMIB packaging technology, a move that would add to Intel’s recent momentum as demand for AI-focused computing continues to surge.
The timing makes sense. The rapid rise of agentic AI is pushing data centers to expand beyond just GPUs and high-bandwidth memory, turning CPUs and custom AI accelerators into some of the most sought-after components in the market. That demand is also raising the bar for manufacturing and especially packaging, since modern AI training chips often require complex multi-die designs and extremely intensive testing.
Google has already been moving quickly with new TPU launches. Its latest TPU8i and TPU8t chips—aimed at inference and training workloads—are reportedly built using TSMC’s CoWoS packaging, a widely used approach across today’s AI infrastructure.
For TPUv8e, however, the report indicates Google could turn to Intel’s EMIB (Embedded Multi-Interconnect Bridge). EMIB is often described as a flexible alternative in the advanced packaging landscape, enabling scalable designs and potentially helping manage cost and complexity compared with some traditional 2.5D packaging methods. In this rumored configuration, Google is expected to design the main compute die itself, while MediaTek would handle the I/O and back-end design work.
Another TPU variant, TPUv8p, is expected to follow a different path. The same report suggests that Google may once again rely fully on Broadcom for compute, I/O, and back-end design for TPUv8p, with packaging handled using TSMC technologies.
It’s worth noting that none of this has been officially confirmed. Intel has previously indicated it avoids naming customers directly and prefers to wait until partners announce products on their own timelines. Still, if Google does adopt EMIB for TPUv8e, it would be a meaningful vote of confidence in Intel Foundry’s packaging capabilities—especially at a moment when the AI boom is stressing the global supply chain and creating strong demand for more capacity and alternative packaging solutions.
As for when this could become public, the reported window for both TPUv8e and TPUv8p points to Q4 2027. If that schedule holds, early details or partner confirmations could surface toward the end of this year or early next year as development progresses and supply-chain plans become more visible.
If the rumor proves accurate, Google’s next-generation TPU strategy could highlight a broader industry shift: advanced packaging is becoming just as crucial as process nodes in determining performance, scalability, and how quickly AI hardware can be delivered at scale.
