Researchers in China have taken a major step toward faster, more energy-efficient chips by building what they describe as the world’s smallest ferroelectric transistor. Created by a team from Peking University and the Chinese Academy of Sciences, the new device shrinks the transistor gate length down to just 1 nanometer and, crucially, operates at only 0.6 volts. The work was reported in the journal Science Advances and targets one of the semiconductor industry’s most stubborn challenges: cutting power consumption without sacrificing speed or memory performance.
Why does 0.6 volts matter so much? Today’s advanced logic chips typically run efficiently around 0.7 volts. But widely used non-volatile memory technologies, such as NAND flash, usually need 5 volts or more for write operations. Even earlier versions of ferroelectric field-effect transistors (FeFETs), which are considered promising for next-generation memory, often required more than 1.5 volts. This mismatch between logic voltage and memory voltage forces chip designers to add step-up and supporting circuits that take up space and waste energy.
That inefficiency becomes especially painful in AI hardware. In many AI chips, a substantial chunk of total power—often estimated at 60% to 90%—can be spent moving data around rather than actually performing calculations. When memory and logic can’t talk to each other efficiently at similar voltages, the system pays a power and performance penalty that limits both battery life and compute density.
To break through this wall, the researchers designed a new gate structure using metallic single-walled carbon nanotubes as the gate electrodes. The idea is simple but powerful: the nanotube acts like a tiny “nanotip” that concentrates the electric field. By intensifying the field right where it’s needed, the device strengthens the coupling between the ferroelectric layer and the transistor channel. That enhanced coupling lets the FeFET switch its polarization state at just 0.6 volts—below the standard voltage used by modern logic—while remaining resistant to short-channel effects that typically plague transistors as they shrink.
The team built the device using molybdenum disulfide (MoS2), a well-known two-dimensional material that’s attracted interest for ultra-scaled electronics. The resulting MoS2 FeFETs delivered standout memory characteristics, including a current on/off ratio of about 2 million and a programming speed as fast as 1.6 nanoseconds. Those numbers point to a combination the industry has been chasing: non-volatile memory behavior that also looks compatible with high-speed computing.
One of the biggest practical advantages is voltage compatibility between memory and logic. If memory can write and operate around the same voltage as logic circuits, chips can potentially avoid extra charge-pump circuits and other voltage-boosting components. Removing those pieces can reduce die area, simplify design, and lower energy loss—exactly what’s needed for high-speed data exchange in AI accelerators and next-generation processors.
The researchers also argue that the core concept isn’t limited to exotic lab-only materials. They say the same field-enhancement principle should work with mainstream ferroelectric materials and can align with standard industrial manufacturing processes, which matters for any technology aiming to move from a scientific breakthrough to real products.
Looking ahead, a 1-nanometer-gate ferroelectric transistor that switches at 0.6 volts could have wide-reaching impact across power-sensitive computing. The most obvious beneficiaries include large model inference, edge AI devices that must do more work locally, and wearables where every milliwatt counts. If the approach scales and integrates well with existing chipmaking flows, it could help future electronics compute faster while spending far less energy shuttling data between memory and logic.
