Cerebras Unveils CS-4 AI System With WSE-3 Turbo Wafer-Scale Chip and Up to 750 PFLOPS Per Rack
Cerebras has introduced its latest AI computing platform, the CS-4, powered by the company’s new WSE-3 Turbo chip. The system is designed to push large-scale AI inference and training performance far beyond conventional rack-based accelerator designs, with Cerebras positioning it as a major step forward for AI factories, frontier models, and high-throughput enterprise workloads.
At the heart of the CS-4 is the WSE-3 Turbo, also known as WSE-3T. This new wafer-scale processor builds on the third-generation Wafer Scale Engine that Cerebras introduced in 2024. Unlike traditional AI chips, which are cut from a wafer into many smaller processors, Cerebras uses nearly the entire wafer as one massive chip. That approach allows the company to pack enormous compute, memory, and communication bandwidth into a single processor.
The WSE-3 Turbo continues Cerebras’ claim to the largest AI processor in the industry. It features 4 trillion transistors and 900,000 AI-optimized cores across a chip area of 46,225 mm². It also includes 44 GB of on-chip SRAM, giving the processor extremely fast access to memory without relying as heavily on external memory systems.
Cerebras says the WSE-3 Turbo delivers up to 125 PFLOPS of dense AI compute per wafer, or up to 250 PFLOPS when using sparsity. Memory bandwidth has also been increased significantly, reaching 43.2 PB/s, while the on-chip fabric delivers 53.5 PB/s of bandwidth. Off-chip I/O bandwidth is rated at 2.4 Tb/s.
Latency is another key focus. Cerebras says improvements to the wafer-scale architecture reduce latency from 5 milliseconds to just 2 milliseconds. For AI inference, where faster response times can directly improve the user experience, that reduction is especially important.
Andrew Feldman, CEO and co-founder of Cerebras, said the CS-4 is intended to change how large AI models are served. According to him, fast inference has often required smaller or less capable models, but the CS-4 is designed to deliver high speeds even on the largest frontier AI models.
While the WSE-3 Turbo is the main attraction, Cerebras is not selling only a chip. The company is presenting the CS-4 as a complete rack-scale AI system built for real-world deployment. Modern AI customers increasingly want full-stack solutions that combine compute, power, cooling, networking, and software into a ready-to-scale platform.
The CS-4 is based on Cerebras’ new Nexus Platform Architecture. This design separates the system into three major layers: compute, power, and I/O. Each rack uses a modular “backpack” layout, where the compute subsystem is attached vertically at the rear of the rack alongside the power array.
Each wafer-scale compute module includes power conversion, direct liquid cooling, high-speed I/O, and control systems in a compact self-contained package. This modular approach is designed to make the CS-4 easier to deploy and scale while improving efficiency.
One of the biggest engineering changes is the relocation of power conversion closer to the wafer-scale chips. By reducing the distance power must travel, Cerebras says it can cut power losses almost entirely. That allows more power to reach the WSE chips directly, enabling higher operating frequencies and faster AI compute performance.
The result is a major performance jump over the previous CS-3 platform. Cerebras claims the CS-4 offers a 10x increase in throughput per watt compared with CS-3.
A single CS-4 rack contains three WSE-3 Turbo chips. Combined, the rack delivers up to 750 PFLOPS of AI compute, 7.2 Tb/s of I/O bandwidth, and 129.6 PB/s of SRAM bandwidth. These figures make the CS-4 one of the most powerful AI rack systems announced for large language model workloads.
Cerebras also highlighted inference performance on large models such as GPT-OSS 120B. According to the company, a single CS-4 rack can produce more than 4,400 tokens per second on that model. In one comparison, Cerebras said the CS-4 generated in one second what a GPU-based rack required around 30 seconds to complete.
That kind of speed is central to the company’s pitch. Faster token generation can improve AI chatbots, coding assistants, enterprise copilots, search systems, and agentic AI applications where users expect near-instant responses. For businesses running large AI models at scale, higher throughput per rack can also reduce infrastructure requirements and operating costs.
The CS-4 is also designed for massive scaling. With its new interconnect architecture, Cerebras says AI factories can connect CS-4 systems into large clusters capable of supporting models with more than 50 trillion parameters. That puts the system in the race for next-generation AI infrastructure, where companies are seeking platforms that can handle increasingly large models without excessive latency or power consumption.
The first CS-4 systems equipped with WSE-3 Turbo chips are expected to ship this quarter. Cerebras is clearly aiming the platform at the same market dominated by GPU-based AI systems, with NVIDIA remaining one of its most important competitors.
Cerebras is also working with AMD to combine wafer-scale rack systems with AMD’s Helios AI rack platform. The goal is to improve AI throughput by pairing different compute approaches and taking advantage of the large on-chip SRAM available in Cerebras’ wafer-scale processors.
With CS-4, Cerebras is betting that wafer-scale computing can offer a more efficient path for high-speed AI inference and large-model deployment. By combining massive on-chip memory, extremely high bandwidth, direct liquid cooling, and rack-scale modular design, the company is pushing an alternative to traditional accelerator clusters at a time when demand for AI compute continues to surge.
