TSMC A14 Production Plans Point to a Major 1.4nm Showdown With Intel 14A in 2028
TSMC is preparing for one of the biggest semiconductor battles of the decade, with its upcoming A14 process node reportedly set for mass production in the first half of 2028. The advanced 1.4nm-class technology is expected to compete directly with Intel’s 14A node, creating a high-stakes race for leadership in next-generation chip manufacturing.
According to industry reports, TSMC plans to begin risk production for A14 in 2027, with broader volume production targeted for 2028. The company’s Hsinchu Science Park Baoshan Fab 20 and Central Taiwan Science Park Fab 25 are expected to play key roles in producing chips based on this cutting-edge node.
The most striking detail is the reported scale of TSMC’s planned output. By 2028, A14 production capacity is expected to be significantly higher than Intel’s 14A capacity, with estimates suggesting TSMC could have a major advantage in available manufacturing volume. That matters because the demand for advanced chips, especially for AI, cloud computing, smartphones, and high-performance processors, is expected to keep rising sharply over the next several years.
TSMC A14 and Intel 14A are both positioned as crucial technologies for their respective companies. TSMC is expected to serve long-standing partners, including major smartphone and computing customers, while Intel’s 14A node is also being aimed at a wide range of external clients. Tesla has been mentioned among potential customers, while companies such as Apple, NVIDIA, Amazon, and Google are also believed to be exploring future supply options for next-generation AI and custom silicon products.
One of the most important technical advances expected with TSMC A14 is a major improvement in SRAM scaling. For years, SRAM bit-cell size has become increasingly difficult to shrink, creating a major challenge for chip designers. TSMC has reportedly not delivered a major SRAM cell scaling step since its N5 process era, but A14 may change that.
The company is expected to reduce SRAM bit-cell size from around 0.021 square micrometers to below 0.017 square micrometers. If achieved, this would mark one of the smallest SRAM cell sizes in the industry and could give TSMC a major density advantage over competing advanced nodes from Intel and Samsung.
SRAM density is a critical factor in modern chip design because processors, GPUs, AI accelerators, and mobile chips rely heavily on on-chip memory. Smaller and denser SRAM can help improve performance, reduce power consumption, and allow more complex designs within the same chip area. For AI chips in particular, memory efficiency is becoming just as important as raw compute power.
TSMC’s current 2nm-class technology uses a high-density SRAM bit cell of around 0.021 square micrometers, offering strong density and energy-efficiency gains over previous generations. Intel’s 18A node is also said to offer a similar high-density cell size, with SRAM density reaching up to 38.1 megabits per square millimeter. However, TSMC A14 is expected to push beyond that by introducing a smaller SRAM cell and a more advanced density profile.
On the transistor side, TSMC A14 will use the company’s second-generation GAAFET nanosheet architecture. This is a major shift from traditional FinFET designs and is intended to improve power efficiency, switching speed, and transistor control at extremely small geometries.
TSMC is also expected to introduce its NanoFlex Pro standard cell architecture with A14. This technology should give chip designers more flexibility when balancing performance, power, and area. Compared with TSMC’s N2 node, A14 is expected to deliver up to 15% higher speed at the same power, or up to 30% better power efficiency at the same speed. Logic density is also expected to improve by more than 20%.
Intel 14A, meanwhile, will rely on RibbonFET 2, Intel’s own GAAFET-style transistor architecture, along with PowerDirect backside power delivery. Backside power delivery is one of the major innovations in advanced semiconductor manufacturing, as it moves power routing to the back of the wafer to improve efficiency and free up space on the front side for signal routing.
TSMC’s baseline A14 node is expected to use frontside power delivery, while a later A14P variant may introduce backside power delivery. This could give TSMC room to improve the platform over time, similar to how the company has refined previous node families through enhanced versions.
Another key difference between the two competing nodes may be lithography strategy. Intel 14A is expected to use High-NA EUV lithography, which enables more precise patterning for extremely small chip features. TSMC A14 is expected to rely on standard 0.33 NA EUV with multi-patterning, at least initially. While High-NA EUV is seen as an important long-term technology, TSMC’s approach may allow it to control manufacturing risk while scaling production more aggressively.
That production scale could become a decisive factor. Advanced chip buyers do not only want the best technology on paper; they also need reliable supply, strong yields, and enough capacity to support large product launches. This is especially true for AI hardware, where demand has been intense and companies are competing to secure manufacturing slots years in advance.
TSMC has reportedly already started early pilot activity around its 1.4nm-class A14 chips and has gained approval for new manufacturing facilities that will support future production ramps. In addition, design tool readiness is moving forward, with major electronic design automation support helping chipmakers prepare products for the new node. Certified design tools can reduce development time and allow customers to move more quickly from early design to tape-out.
The 2028 timeline is shaping up to be a crucial moment for the semiconductor industry. TSMC A14 and Intel 14A will not just represent another node transition; they will define the next phase of competition in AI processors, custom silicon, mobile chips, data center accelerators, and high-performance computing.
For TSMC, A14 could reinforce its position as the world’s most important contract chip manufacturer. For Intel, 14A is a major opportunity to prove that its foundry strategy can compete at the leading edge. For chip designers, the race could bring faster, more power-efficient processors and more advanced AI hardware.
If current expectations hold, TSMC A14 may enter 2028 with a major capacity advantage, improved SRAM density, second-generation nanosheet transistors, and strong support from key customers. Intel 14A, on the other hand, will push forward with advanced backside power delivery and High-NA EUV. Together, these technologies will set the stage for one of the most important semiconductor rivalries in years.
