TSMC has pulled back the curtain on what it calls its most cutting-edge manufacturing campus yet, a new facility in Taichung, Taiwan, dedicated to the Angstrom-era A14 (1.4nm) process. The investment underscores the company’s drive to stay in front of the semiconductor curve, even as its 3nm family continues to ramp across premium smartphones, AI accelerators, and high-performance computing.
Local reports indicate the project will cost around $48.5 billion, making it the company’s most expensive build to date. The site will ultimately host four fabs. The first is slated to come online by the end of 2027, with initial mass production targeted for 2028 and an early output around 50,000 wafers. That pace positions the A14 node to quickly serve top-tier mobile silicon and AI workloads as soon as the lines stabilize.
In a strategic pivot, the campus was originally planned for 2nm but has been upgraded to 1.4nm as part of a broader capacity roadmap. The company aims to keep its most advanced, cutting-edge technologies rooted in Taiwan, while expanding production of earlier nodes in overseas facilities to better match customer demand patterns. At the same time, a significant portion of 2nm capacity is expected to be built up in the United States to serve both mobile and HPC customers.
Technically, A14 is notable for what it will and won’t use. Instead of adopting High-NA EUV lithography at this stage, the node will rely on advanced multi-patterning techniques. This contrasts with rival roadmaps that plan to lean into High-NA EUV for comparable nodes. TSMC’s bet reflects confidence in its process integration and yield engineering, areas where the foundry has long extracted performance-per-watt and density gains through meticulous patterning and design-technology co-optimization.
Demand signals for A14 are already clear. On the mobile side, Apple, Qualcomm, and MediaTek are poised to be early adopters, seeking power efficiency and transistor density gains for next-generation flagship devices. In the data center, NVIDIA and AMD are expected to tap the process for upcoming AI architectures, where every watt and square millimeter counts for training and inference performance at scale.
Key points at a glance:
– New Taichung campus is dedicated to A14 (1.4nm), part of the Angstrom-era roadmap
– Estimated cost of about $48.5 billion, the company’s largest single investment to date
– Four-fab complex, with the first fab targeted to start by late 2027 and mass production in 2028
– Early output projected at roughly 50,000 wafers as production ramps
– A14 favors advanced multi-patterning over High-NA EUV in its initial implementation
– Strategy keeps the bleeding edge in Taiwan while ramping earlier nodes in overseas sites
– Expected customers include Apple, Qualcomm, MediaTek, plus NVIDIA and AMD for next-gen AI
What to watch next: progress updates on tool installation and pilot lines, clarity on power, performance, and area (PPA) targets versus 2nm-class nodes, and how quickly ecosystem partners—IP vendors, EDA providers, and packaging houses—align around A14 for both mobile SoCs and AI accelerators. As the Angstrom era accelerates, time-to-yield and advanced packaging will be just as critical as transistor scaling in determining who leads the next wave of chips powering phones, PCs, and hyperscale AI.
