TSMC is taking a different path to push beyond 2nm. Instead of paying for ultra-expensive High-NA EUV systems, the company plans to lean on photomask pellicles and its fleet of current EUV tools to unlock 1.4nm and even 1nm production.
Here’s the strategic backdrop. TSMC can mass-produce 2nm chips with today’s EUV scanners, and full-scale output is slated to begin by the end of 2025. The real challenge arrives below 2nm, at the 1.4nm and 1nm nodes often referred to as A14 and A10. That is typically where High-NA EUV equipment shines—these next-gen machines promise tighter patterning and higher yields at the smallest geometries. The catch is cost and availability: each system is about $400 million, and only a handful are built each year.
TSMC appears unconvinced the price-to-value ratio pencils out for its roadmap. Instead, it is building scale around existing EUV platforms while introducing photomask pellicles to safeguard yields. Pellicles act like a protective window over the mask, preventing particles and dust from triggering catastrophic defects during exposure. At sub-2nm, where more exposures per layer are required and masks are used more intensively, pellicles become essential to keep contamination at bay.
This strategy isn’t without trade-offs. Relying on standard EUV for 1.4nm and 1nm increases the number of exposures and stress on the photomask, which can pressure yields. TSMC is expected to iterate through a trial-and-error phase to fine-tune reliability, balance throughput, and optimize mask lifetime. Even so, the overall economics may favor this route: rather than waiting for a limited supply of High-NA machines, TSMC is reportedly adding around 30 conventional EUV tools to meet surging demand from top clients like Apple.
The company has already put serious money behind this plan. It has committed roughly NT$1.5 trillion—about $49 billion—to the 1.4nm transition, with R&D underway in Hsinchu and production targeted to begin around 2028. By scaling with more readily available EUV systems and integrating pellicles, TSMC aims to move quickly, control costs, and ramp capacity faster than competitors tethered to the slow rollout of High-NA hardware.
Bottom line: TSMC’s bet on pellicles and standard EUV is a calculated push to keep Moore’s Law marching forward while avoiding the price and supply bottlenecks of High-NA EUV. If the company can crack the yield and reliability challenges, it could bring 1.4nm and 1nm chips to market on its own timetable—and at scale.
