SK Hynix is targeting an October tape-out for its HBM4 memory, which will be used to power NVIDIA’s next-generation Rubin AI chips. The company has also planned for a subsequent tape-out of HBM4 memory for AMD’s AI chips a few months later. According to reports, the completion of the design for the 6th generation HBM memory is imminent, with the finalized design set to be sent for manufacturing next month.
In semiconductor manufacturing, ‘tape-out’ is a crucial term. It signifies the final stage of the design process where the complete chip design is ready and validated, ensuring the memory is fully functional before it moves to the manufacturing phase. SK Hynix is pacing itself to match competition from its main rival, Samsung.
SK Hynix has already taken a leading position by supplying its HBM3E memory to NVIDIA earlier. Production of the HBM4 memory marks another milestone, offering significant improvements in speed, power efficiency, and bandwidth over previous generations. HBM4 will feature a channel width of 2048 bits, double that of HBM3E, enabling faster data transfer essential for high-performance applications. It will also support the stacking of 16 DRAM dies for a total capacity of 64GB per stack, a substantial increase from the 32GB offered by HBM3E.
Furthermore, SK Hynix has indicated that HBM4 will deliver 20 to 30 times higher performance compared to existing HBM memories. As development teams within SK Hynix prepare to supply both NVIDIA and AMD, parallel efforts by Samsung to advance their HBM4 memory could pose competitive challenges. While Samsung’s journey with HBM3E faced some quality control hurdles, both companies are expected to ramp up mass production of HBM4 by the end of next year, aligning their timelines closely.
The race between SK Hynix and Samsung to develop and supply the most advanced HBM memory is intensifying, with SK Hynix positioning itself to meet the demands of NVIDIA’s future Rubin AI chips and potentially AMD’s needs as well.
