A digital rendering of the TSMC A16 CPU chip with the text 'The World's Most Advanced CPU' displayed above it.

NVIDIA’s Rosa CPUs May Tap TSMC’s 2nm or A16 Nodes With Backside Power Tech

NVIDIA Rosa CPUs Could Use TSMC 2nm or A16 Technology for Next-Generation AI Performance

NVIDIA’s upcoming Rosa CPUs are shaping up to be a major step forward for AI computing, with new reports suggesting the company is looking at TSMC’s most advanced chipmaking technologies for production. The next-generation processor is expected to arrive around 2029 for data center platforms, with later variants potentially aimed at PC-focused AI systems by 2030.

According to industry reports from Taiwan, NVIDIA is evaluating TSMC’s 2nm-class process technology and the newer A16 node for Rosa. While TSMC’s N2P process is already expected to power several future high-performance chips across the industry, NVIDIA may be especially interested in A16 because of one key feature: backside power delivery.

TSMC’s A16 process includes a technology known as Super Power Rail, which changes how power and signals move through a chip. In traditional designs, both power delivery and signal routing compete for space on the front side of the silicon. With backside power delivery, the front side can focus on signals and clock distribution, while the back side handles power delivery.

That design shift could be a major advantage for a processor like Rosa, which is being built for demanding AI workloads. By separating power and signal pathways, A16 can improve efficiency, increase density, and boost overall performance without requiring a larger chip footprint.

Compared with TSMC’s N2P process, A16 is expected to deliver an 8% to 10% speed improvement, 15% to 20% lower power consumption at the same speed, and around 10% better chip density. For AI data centers, where performance-per-watt is one of the most important metrics, those gains could make Rosa significantly more competitive.

The move toward A16 could also have a wider impact on the semiconductor supply chain. Backside power delivery requires more advanced manufacturing steps, including chemical mechanical polishing, often referred to as CMP. As a result, demand may rise for CMP processes, consumables, and carrier wafers, benefiting suppliers involved in advanced chip production.

Rosa is not just about a smaller manufacturing node. It is expected to introduce a new NVIDIA CPU core architecture called Rigel, based on Arm v9.2. This follows NVIDIA’s Vera CPU, which uses custom Olympus cores also based on Arm v9.2-A.

Vera was designed to offer a major jump over NVIDIA’s Grace CPU, including higher throughput, improved memory bandwidth, and stronger per-core performance. Rosa is expected to push that strategy even further, focusing heavily on maximum single-threaded CPU performance at scale.

That focus matters because modern AI systems are evolving beyond simple parallel workloads. Agentic AI, reasoning models, complex orchestration, and large-scale inference pipelines can benefit from stronger single-thread performance, lower latency, and more efficient CPU-to-GPU coordination. NVIDIA appears to be designing Rosa specifically for that future.

Grace, NVIDIA’s current data center CPU, uses Arm Neoverse V2 cores and has been shipping since 2023. Vera moves to NVIDIA’s own Olympus core design and is expected to power Vera Rubin systems in 2026. Rosa will continue that evolution with the new Rigel architecture, targeting even higher single-core performance while maintaining efficiency at massive scale.

Vera already improves on Grace with more cores, higher memory bandwidth, and a custom monolithic design aimed at reducing chiplet-related latency. Rosa is expected to build on that foundation with larger cache, more efficient memory support, and further interconnect improvements, although final specifications have not yet been confirmed.

Memory will also be a key part of Rosa’s performance story. Grace relies on LPDDR5X with ECC, while Vera supports higher-bandwidth LPDDR5X configurations and is associated with next-generation memory approaches such as SOCAMM and LPDDR6 in some platforms. Rosa is expected to continue this direction, potentially using LPDDR6 or LPDDR6X-class memory in future AI-focused systems.

The bigger picture is clear: NVIDIA is building a CPU roadmap that is increasingly customized for AI infrastructure. Grace established NVIDIA’s Arm-based CPU presence in accelerated computing. Vera is expected to bring a major leap in custom CPU performance for AI systems. Rosa could be the next major milestone, combining a new Rigel core architecture with TSMC’s most advanced process technologies.

If NVIDIA chooses TSMC A16 for Rosa, the chip could gain a meaningful advantage in performance, power efficiency, and density. For hyperscale data centers and AI factories, those improvements could translate into faster model execution, better energy efficiency, and more compute capacity within the same physical space.

Rosa is still several years away, and final details may change before launch. However, the direction is already becoming clear. NVIDIA is not treating CPUs as secondary components in AI systems. Instead, it is designing them as critical engines for next-generation AI workloads, tightly aligned with its GPU roadmap and advanced packaging strategy.

With TSMC 2nm and A16 technologies under consideration, NVIDIA Rosa could become one of the most important AI CPUs of the late decade. If the reported performance and efficiency advantages materialize, Rosa may play a central role in the next wave of data center AI platforms.