JEDEC is pushing DDR5 MRDIMM memory forward for next-generation data centers, and the latest update is all about one thing: more bandwidth for AI-era computing.
When the first DDR5 MRDIMM (Multiplexed Rank DIMM) designs were introduced about two years ago, they already looked like a major step up for servers, pairing large module capacities (up to 256GB per module) with fast data rates reaching 8,800 MT/s. Since then, demand from AI training, inference, and other data-heavy workloads has only intensified, and that pressure is driving memory bandwidth requirements sharply upward.
Now JEDEC is extending the DDR5 MRDIMM roadmap with a new performance target of up to 12,800 MT/s. That represents roughly a 45% increase in data rate compared to the earlier 8,800 MT/s designs, and it signals where high-end server memory is headed as platforms chase higher throughput and better system-level efficiency.
Alongside the speed roadmap, JEDEC also shared several standardization milestones from its JC-40 and JC-45 committees, focusing on the key building blocks that make higher-bandwidth MRDIMM modules possible:
JEDEC has published JESD82-552 (DDR5MDB02), the Multiplexed Rank Data Buffer standard. This specification defines next-generation data buffer behavior for multiplexed rank DIMM architectures, with an emphasis on stable, robust operation as module bandwidth scales higher.
Another standard is close behind. JESD82-542 (DDR5MRCD02), the Multiplexed Rank Registering Clock Driver specification, is expected to be published soon. It’s designed to improve signal integrity and timing control in DDR5 MRDIMM module designs, working together with the new data buffer standard to support higher data rates.
On the module side, the MRDIMM Gen2 standard is nearing completion. The goal is to advance high-performance DDR5 MRDIMM design to keep up with growing bandwidth needs and improve overall efficiency for future computing platforms.
JEDEC is also developing DDR5 MRDIMM Gen2 raw card designs targeting 12,800 MT/s, reinforcing that these higher speeds aren’t just theoretical—they’re being built into the next wave of module designs. At the same time, work is already looking ahead to MRDIMM Gen3, with the underlying memory interface logic nearing finalization.
The takeaway is clear: DDR5 MRDIMM is evolving quickly to meet AI data center realities, and JEDEC’s newest standards and roadmap updates are laying the groundwork for higher-bandwidth, scalable server memory that can keep pace with the next generation of compute.
