Intel Foundry is making waves in the semiconductor industry with groundbreaking innovations in transistor and packaging technologies. At the prestigious IEEE International Electron Devices Meeting (IEDM) 2024, Intel unveiled a suite of advancements that are set to catapult the industry into a new era, paving the way for significant improvements in chip performance and efficiency.
One of the standout developments is Intel’s work with subtractive ruthenium, a novel metallization material that dramatically boosts interconnect performance within chips. By utilizing thin film resistivity and air gaps, Intel has achieved a substantial 25% reduction in capacitance. This innovation promises to enhance the integration and efficiency of future chips beyond what’s achievable with traditional copper materials.
In another pioneering move, Intel has introduced Selective Layer Transfer (SLT), a groundbreaking solution for advanced packaging. This technology allows for ultra-fast chip-to-chip assembly, boosting throughput by an astounding 100 times. It’s a leap forward for heterogeneous integration, supporting the creation of ultra-thin chiplets that are smaller yet more powerful, making it an ideal fit for AI applications.
Intel’s exploration of RibbonFET CMOS and gate oxide technologies demonstrates a commitment to pushing the boundaries of gate-all-around scaling. The showcasing of silicon RibbonFET at a gate length of 6 nm demonstrates industry-leading performance that firmly supports the ongoing pursuit of Moore’s Law. In a further leap, Intel is working on the fabrication of GAA 2D FETs with an emphasis on gate oxide developments, eyeing new materials as potential successors to silicon.
Additionally, Intel is at the forefront of gallium nitride (GaN) technology for power and RF electronics. This innovation allows for devices that can handle higher voltages and temperatures, promising better performance over traditional silicon-based counterparts. The GaN-on-TRSOI substrates are engineered to optimize RF and power applications by reducing signal loss and enhancing linearity.
Intel’s ambitious roadmap for the future of transistors and packaging seeks to enable the integration of a trillion transistors on a single chip by 2030. The strategy focuses on overcoming traditional bottlenecks with advanced memory integration, hybrid bonding, and modular system expansions. This forward-thinking approach also emphasizes the development of ultra-low voltage transistors, aiming to tackle thermal challenges while significantly reducing power consumption.
As Intel rallies the industry for transformative innovations, the advancements showcased at IEDM 2024 are a testament to their commitment to driving semiconductor technology into the next decade with renewed vigor and potential.
