AMD EPYC Verano debuts with Zen 6 cores and LPDDR5X memory for next-generation AI servers
AMD has offered the first look at its upcoming EPYC Verano processors, a new class of data center CPUs designed to push the company deeper into the age of agentic AI. Revealed during the OCP Global Summit, Verano represents an important step in AMD’s server roadmap by combining Zen 6 CPU cores with LPDDR5X memory through the SOCAMM2 form factor.
The result is a processor platform built for AI infrastructure that needs high compute density, strong memory bandwidth, and better power efficiency.
AMD has already introduced Zen 6 EPYC processors under the Venice family, but Verano is different. While Venice targets a broad range of data center and cloud workloads, Verano is being positioned as an AI-host-optimized CPU. That means it is designed to sit at the heart of next-generation AI systems, feeding accelerators, managing agent-based workloads, and supporting large-scale compute environments where efficiency and bandwidth matter as much as raw core count.
The upcoming AMD EPYC Verano chips will be part of the EPYC 9006 “LP” lineup. Earlier details pointed to configurations with up to 72 cores on a single-socket platform. However, AMD has now indicated that Verano could scale up to 192 cores. This may refer to a single high-density configuration or a dual-chip arrangement using two 96-core processors.
Either way, the direction is clear: AMD wants Verano to deliver serious CPU horsepower for AI servers.
One of the most important upgrades is memory. AMD EPYC Verano will be the first EPYC CPU to support SOCAMM2 memory, a compact memory module format currently based on LPDDR5X DRAM. This is a major shift for server CPUs because LPDDR memory is typically associated with mobile and power-efficient computing devices.
For AI servers, however, LPDDR5X offers several advantages. It can provide strong memory bandwidth, improved power efficiency, and higher memory density in a compact footprint. These qualities are especially valuable in dense AI racks, where every watt and every millimeter of space matters.
Verano will use the SP8 platform and is expected to include LPDDR5X memory controllers integrated around the CPU package. The chip displayed during the event appeared to feature eight Zen 6 CCDs, two large I/O dies, and four LPDDR5X memory controller sections positioned around the outer edges.
The visible chip layout suggests AMD may be using standard Zen 6 chiplets rather than the denser Zen 6C variants. The CCDs appeared smaller than those seen on some Venice designs, which could point to 12-core Zen 6 dies instead of the 32-core Zen 6C chiplets used for maximum density.
Another major feature is high-speed xGMI connectivity. AMD says Verano can support up to 112 Gbps xGMI links, which are expected to help connect the CPU to future Instinct MI500 GPUs in next-generation AI racks. This is critical for agentic AI workloads, where CPUs and accelerators need to exchange massive amounts of data quickly and efficiently.
Agentic AI is becoming one of the most important trends in enterprise computing. Unlike traditional AI inference tasks, agentic AI systems can plan, reason, take actions, use tools, and interact with other software systems. These workloads require more than just powerful GPUs. They also need capable host CPUs that can manage orchestration, memory, data movement, sandboxed environments, and general-purpose computing tasks.
That is where AMD EPYC Verano is expected to play a major role.
During the presentation, AMD CEO Dr. Lisa Su described Verano as the next step in the company’s CPU roadmap for the AI era. The message was clear: AI infrastructure is no longer only about accelerators. CPUs are becoming increasingly important as AI systems grow more complex and more distributed.
AMD is not alone in this direction. The broader AI hardware market is moving toward memory-efficient, high-bandwidth designs, and LPDDR5X is becoming a popular choice for future AI platforms. Several upcoming AI processors and accelerators are expected to use similar memory strategies because they offer a strong balance of bandwidth, capacity, and energy savings.
This shift is especially important as data centers face growing power and cooling challenges. AI clusters consume enormous amounts of energy, and traditional server memory can be a major contributor to system power draw. By using LPDDR5X through SOCAMM2, AMD may be able to reduce power consumption while still delivering the memory performance required for AI-heavy deployments.
AMD also highlighted the growing demand for server CPUs. According to the company, the server processor market could expand by around 50% by 2030, potentially reaching $200 billion. With EPYC already gaining strong traction in cloud, enterprise, and high-performance computing, the Verano generation could strengthen AMD’s position even further.
The timing is important. Competition in AI hardware is intensifying, with major chipmakers working on specialized processors for inference, training, cloud computing, and autonomous AI agents. AMD’s approach is to offer a broader platform that includes EPYC CPUs, Instinct GPUs, open infrastructure, and software support for large-scale AI systems.
Verano fits into that strategy by giving AMD a CPU designed specifically for the new demands of AI servers. It is not just another high-core-count processor. It is a platform built around memory efficiency, accelerator connectivity, and AI workload orchestration.
AMD EPYC Verano is expected to become available in 2027. By then, AI infrastructure requirements are likely to be even more demanding, with larger models, more autonomous agents, and heavier enterprise adoption. If AMD delivers on its roadmap, Verano could become a key part of the company’s next major push in the data center market.
For now, the first look at EPYC Verano shows where AMD is heading: more cores, faster interconnects, LPDDR5X memory, and a stronger focus on CPUs as essential components of the AI era.
