TSMC’s most advanced chip lines are running hot as demand for 3nm silicon surges from industry heavyweights like NVIDIA, Apple, Qualcomm, and MediaTek. Analysts now expect the foundry’s 3nm capacity to brush up against its limits as soon as next year, triggering a scramble to unlock more output and keep delivery schedules on track.
To ease the crunch, TSMC is reconfiguring parts of its manufacturing network. Some 4nm lines are being converted to 3nm, with one facility alone set to add roughly 25,000 wafers per month. Older N6 and N7 lines that had been idling are being redeployed for 3nm back-end processes, contributing an additional 5,000 to 10,000 wafers monthly. At the same time, capacity is being reserved for future nodes, including the 2nm N2 and A16 technologies, which puts further pressure on today’s 3nm supply.
Even with those moves, output is unlikely to hit earlier projections. While previous expectations pointed to 160,000 3nm wafers per month by the end of 2025, the latest view suggests TSMC will reach only about 140,000 to 145,000 wafers per month by the end of 2026. NVIDIA, a key driver of AI compute demand, is said to be pushing for capacity to climb to 160,000 wafers per month, underscoring how tight the market has become.
That scarcity is changing pricing dynamics. To secure faster turns and guaranteed delivery windows, some customers are reportedly paying “hot run” premiums that run 50% to 100% above standard pricing—though these expedited orders represent only around 10% of total capacity. The result: TSMC’s gross margins are climbing past 60%, with additional price increases of up to 10% expected as demand continues to outstrip supply.
The near-term picture is clear: 3nm remains supply-constrained, and the biggest buyers of AI and mobile chips are competing for every wafer. Longer term, all eyes are on the 2nm ramp, with mass production slated to begin toward the end of 2025. If that transition stays on schedule, it could ease some pressure on 3nm while setting the stage for the next leap in performance and efficiency.
Key takeaways:
– 3nm capacity is nearing its ceiling due to heavy demand from leading chip designers.
– TSMC is converting 4nm lines and repurposing N6/N7 equipment for 3nm back-end steps, adding 30,000 to 35,000 wafers per month in total.
– Updated targets point to 140,000–145,000 3nm wafers per month by late 2026, below earlier 2025 expectations.
– Premium “hot run” orders, about 10% of capacity, are fetching 50%–100% higher prices, supporting margins above 60%.
– Broad price hikes of up to 10% are reportedly on the way amid unrelenting demand.
– 2nm mass production is expected to start by the end of 2025, with N2 and A16 lines already in focus.
For customers and consumers, the message is similar: expect tight supply and firm pricing on cutting-edge chips until new capacity comes online and next-gen nodes scale.
