Samsung may turn part of its upcoming research and development facility in Giheung, South Korea, into a production line for advanced HBM base logic dies, according to industry sources cited by ZDNet. The move could support future high-bandwidth memory production for AI accelerators, including chips used by NVIDIA.
The facility is still under construction, and its opening is reportedly about two years away, so Samsung’s plans could still change. However, the idea points to how important HBM memory has become in the global AI chip race.
High-bandwidth memory, or HBM, is a critical component in modern AI computing systems. Unlike standard memory, HBM uses multiple DRAM layers stacked vertically to deliver much higher bandwidth while saving space and power. This design is essential for data centers, AI training systems, and next-generation GPUs that need to process huge amounts of data at high speed.
As HBM technology advances, the base die beneath the stacked DRAM layers is becoming increasingly important. The base die handles key logic functions and connects the memory stack to the processor. With each new generation of HBM, performance demands rise, pushing manufacturers to use more advanced chipmaking processes.
Earlier generations of HBM relied on simpler base die technology. But with HBM3 and HBM3E, memory makers began shifting toward foundry-level logic processes as data transfer speeds and pin performance increased. Base dies moved into process technologies ranging from around 20 nanometers to 12 nanometers.
The next major leap is HBM4, which is expected to power future AI hardware. HBM4 requires even more advanced base die technology due to wider memory buses, higher data rates, and a greater number of through-silicon vias, commonly known as TSVs. These technical requirements have made foundries more important in HBM production, with companies such as Samsung Foundry and TSMC taking on a larger role in manufacturing the logic portion of the memory stack.
The latest report claims Samsung is considering using the NRD-K Line 2 at its Giheung R&D site to manufacture HBM base dies using a 2-nanometer process. If the plan moves ahead, it would represent a significant step in Samsung’s effort to strengthen its position in the AI memory market.
Samsung had previously announced plans to use 4-nanometer technology for its HBM4 memory chips. A potential shift toward 2-nanometer base die production would suggest the company is already preparing for more advanced AI memory products beyond the first wave of HBM4.
Competition in the HBM market is intensifying as AI chip demand continues to grow. SK hynix is working with TSMC for its HBM products, while Micron has also partnered with TSMC for HBM4 development. TSMC offers both mature and advanced process options for HBM base die production, including N12 and N5 technologies.
For Samsung, producing advanced HBM base dies in-house could offer strategic benefits. It may give the company more control over production, improve integration between its memory and foundry businesses, and help it compete more aggressively for AI chip customers.
NVIDIA remains one of the most important customers in the AI hardware supply chain, and memory suppliers are racing to meet its performance and volume requirements. If Samsung can successfully develop 2-nanometer HBM base die manufacturing, it could improve its chances of securing a stronger role in future AI accelerator platforms.
While the reported plan is not final, it highlights a broader industry trend: HBM is no longer just about stacking more DRAM layers. The logic base die is becoming a key performance driver, and advanced manufacturing nodes are becoming central to the future of AI memory.
As artificial intelligence workloads continue to expand, demand for faster and more efficient HBM will likely keep rising. Samsung’s possible 2-nanometer HBM base die strategy shows how memory makers are adapting to a market where cutting-edge logic technology and advanced packaging are becoming just as important as DRAM capacity itself.
