MediaTek’s Next-Generation AI Chip Program Will Reportedly Rely Only on Intel EMIB-T Packaging
MediaTek has made a significant move in the advanced semiconductor packaging race, stating at Goldman Sachs Taiwan Day that its next-generation program will adopt Intel’s EMIB-T packaging technology exclusively. The company said tape-out is targeted for the fourth quarter of 2026, with mass production expected by the fourth quarter of 2027.
The announcement is an important signal for the AI chip market, where advanced packaging has become just as critical as chip design itself. As artificial intelligence workloads demand faster data movement, higher memory bandwidth, and better power efficiency, companies are increasingly looking beyond traditional chip manufacturing and focusing on how different chip components are connected inside a package.
Intel’s EMIB-T technology is being positioned as an alternative to TSMC’s CoWoS packaging, which is widely used in high-performance AI accelerators. The key difference lies in how the components are linked. CoWoS typically uses a large silicon interposer to connect the compute chiplets and high-bandwidth memory. EMIB, short for Embedded Multi-die Interconnect Bridge, uses smaller silicon bridges only where they are needed.
This selective bridge approach could reduce manufacturing complexity and lower costs, two major factors as demand for AI processors continues to grow. By removing the need for a large interposer, EMIB-T may offer a more efficient packaging route for certain custom AI chips and processors.
MediaTek’s statement is especially notable because the Taiwanese supply chain has been discussing EMIB-T for months. Reports have also indicated that MediaTek has been preparing additional supplier relationships to support expected orders for chips using this packaging technology.
The next-generation program MediaTek referred to has not been fully detailed, but it is widely expected to involve custom AI chips and possibly CPU-related products. MediaTek is also reportedly involved in Google’s next-generation TPU custom AI chip efforts, and supply chain reports have suggested that these future AI processors may also consider Intel’s EMIB-T packaging.
For Intel, the development represents a strategic win. The company has been working to expand its role in the AI semiconductor market, not only through processors but also through foundry services and advanced packaging technologies. Winning more customers for EMIB-T would help Intel strengthen its position against established packaging solutions used by major AI chip designers.
However, EMIB-T’s long-term success will depend heavily on production yield. Industry analyst Ming-Chi Kuo has noted that yield performance will be a key factor in determining whether the technology can scale successfully. According to his analysis, Intel has set a 98% benchmark for EMIB-T to make it comparable with established Flip Chip Ball Grid Array production standards.
Yield is especially important in AI chip manufacturing because advanced packages are expensive to produce. A higher yield means more usable chips from each production batch, which helps reduce the cost per chip. For companies building custom AI processors, cost efficiency can be a major advantage, particularly when competing against dominant AI hardware providers such as NVIDIA.
While CoWoS remains highly attractive for cutting-edge AI GPUs because of its strong bandwidth capabilities, EMIB-T could become a compelling option for companies looking to balance performance, cost, and manufacturing scalability. This makes MediaTek’s decision important not only for Intel but also for the broader AI hardware supply chain.
If MediaTek’s timeline holds, the industry could see the first major results of this EMIB-T-focused program in late 2026, followed by volume production in late 2027. By then, demand for custom AI chips, cloud accelerators, and next-generation data center processors is expected to be even stronger.
MediaTek’s commitment to Intel EMIB-T highlights a growing shift in the semiconductor industry: advanced packaging is now a central battleground in AI chip development. As companies race to build faster and more efficient processors, the way chips are assembled may become one of the biggest factors shaping the next wave of AI computing.
