Intel EMIB-T Packaging Reportedly Gains Momentum for Google’s Next-Generation AI TPU Chips
The race to build faster and more efficient AI chips is putting intense pressure on the semiconductor supply chain, especially in advanced chip packaging. As demand for AI accelerators continues to surge, packaging capacity has become one of the biggest bottlenecks in the industry. That pressure appears to be opening the door for Intel’s EMIB-T technology, which is now reportedly gaining more attention as a potential packaging solution for Google’s next-generation custom AI chips.
Intel’s EMIB, short for Embedded Multi-die Interconnect Bridge, is designed to connect multiple chip components inside a single package. In AI processors, this is especially important because compute dies, high-bandwidth memory, and other supporting components must communicate quickly and efficiently. Intel has positioned EMIB as an alternative to TSMC’s CoWoS packaging, which has been in extremely high demand due to the AI boom.
Recent supply chain reports from Taiwan suggest that Google may become a major customer for Intel’s EMIB-T technology, particularly for its future tensor processing units, better known as TPUs. These custom AI accelerators are central to Google’s artificial intelligence infrastructure and are used to power large-scale machine learning workloads.
The latest reports indicate that Powerchip Semiconductor Manufacturing Corporation, also known as PSMC, and AP Memory Technology may now be involved in the broader supply chain tied to Google’s upcoming AI TPU development. PSMC is a semiconductor foundry, while AP Memory specializes in integrated circuit design and memory-related technologies.
AP Memory’s silicon capacitor products are said to be playing an important role in MediaTek’s design work for Google’s AI chips. MediaTek has reportedly been working with Google on the development side, which is where Intel’s packaging technology may enter the picture. If Google moves forward with EMIB-T for its next TPU generation, it could mark a meaningful win for Intel’s foundry and advanced packaging ambitions.
One area drawing attention is the supply of silicon capacitors, often referred to as SiCap components. These capacitors are important for advanced packaging platforms because they help support stable power delivery and signal integrity in complex multi-chip designs. However, production capacity may become a constraint. Reports suggest that SiCap output could reach around 10,000 units by the end of 2027, which may not be enough if demand for EMIB-based packaging rises quickly.
That is where PSMC could potentially play a larger role. The company may help expand production capacity as more AI chipmakers look for alternatives or supplements to existing advanced packaging options. With AI hardware demand showing no signs of slowing, companies across the semiconductor ecosystem are looking for ways to improve supply flexibility and reduce dependence on limited packaging capacity.
There are also claims that executives from PSMC and AP Memory could meet with Intel CEO Lip-Bu Tan to discuss their potential roles in the supply chain. While nothing has been officially confirmed, the reported talks highlight how important advanced packaging has become in the global AI chip market.
Intel has been promoting EMIB as a cost-effective and scalable packaging solution. The company says the technology can offer strong performance while avoiding some of the complexity and cost associated with other high-end packaging methods. EMIB-T, which incorporates through-silicon vias for improved connectivity, is viewed as a more advanced version of Intel’s bridge-based packaging approach.
For Google, the final decision may depend heavily on production yields and overall cost efficiency. Even if Intel’s EMIB-T technology proves technically attractive, high-volume AI chip production requires consistent yields, predictable supply, and competitive pricing. Reports also suggest that Google may be considering sending chip designs directly to TSMC in an effort to reduce costs, rather than relying fully on an intermediary design partner.
The broader takeaway is clear: advanced packaging is now just as important as chip fabrication in the AI era. As AI processors become larger, more complex, and more dependent on high-bandwidth memory, packaging technologies such as Intel EMIB-T and TSMC CoWoS are becoming critical to performance and supply availability.
If Google adopts Intel’s EMIB-T for future TPU chips, it could strengthen Intel’s position in the AI semiconductor supply chain and give the company a major validation point for its advanced packaging strategy. At the same time, the involvement of companies like PSMC and AP Memory shows that the AI chip ecosystem is becoming increasingly interconnected, with foundries, memory designers, packaging specialists, and hyperscale cloud companies all playing crucial roles.
As AI demand continues to reshape the semiconductor industry, the competition will not be limited to who can design the fastest chip. The real advantage may come from who can package, scale, and deliver those chips efficiently. Intel’s EMIB-T technology could become an important part of that equation if the reported Google TPU partnership moves forward.
