A new “Semiconductor Technology Roadmap 2026” from the Institute of Semiconductor Engineers lays out an ambitious 15-year vision for how far chip technology could go—and it suggests the industry may be headed for a landmark shift beyond today’s nanometer race.
The headline prediction is that by 2040, semiconductor circuits could shrink to 0.2nm, effectively moving into the angstrom (A) era. That’s a massive leap from recent milestones such as Samsung’s first 2nm Gate-All-Around (GAA) chipset announcement, and it also comes with a big reality check: reaching sub-1nm manufacturing won’t be a straight line. The roadmap emphasizes that major scientific and engineering breakthroughs will be required, with plenty of obstacles between today’s leading-edge nodes and true angstrom-class designs.
Beyond transistor scaling, the roadmap outlines how multiple areas of semiconductor innovation are expected to surge at the same time. One projection claims NAND flash could expand from today’s hundreds of stacked layers to as many as 2,000 layers, a huge jump compared to current high-layer 3D NAND. On the AI compute side, the roadmap expects rapid growth from processors capable of tens of trillions of operations per second into a future where performance targets become dramatically higher for both training and inference workloads.
According to a report citing the roadmap’s goals, the plan is meant to strengthen long-term competitiveness in semiconductor technology and industry, energize academic research, and guide talent development strategies. It also frames progress across nine major categories, including semiconductor devices and processes, AI semiconductors, optical interconnect semiconductors, wireless-connected semiconductor sensors, wired connection semiconductors, PIM (processing-in-memory), advanced packaging, and quantum computing.
Samsung is highlighted as a key player in next-generation manufacturing, with 2nm GAA currently positioned as the most advanced lithography mentioned. The company is reportedly preparing improvements to its 2nm roadmap as well. It has completed the basic design for its second-generation 2nm GAA process, and it’s expected to introduce an even more advanced third-generation 2nm GAA variant (referred to as SF2P+) within about two years.
Looking farther ahead, the roadmap estimates that a 0.2nm-class process could rely on next-generation transistor structures such as CFET (Complementary Field Effect Transistor) along with monolithic 3D integration. In plain terms, this points to a future where shrinking transistors isn’t only about printing smaller features, but also about stacking and redesigning device structures to keep performance improving when traditional scaling becomes harder.
The push doesn’t stop at mobile processors. Samsung is also said to have formed a dedicated team to begin research on 1nm chip development, targeting mass production around 2029. The roadmap’s expectations extend to memory as well, with DRAM circuit scaling projected to move from roughly 11nm to 6nm. High-Bandwidth Memory (HBM) is also expected to evolve sharply, with projections that it could grow from around 12 layers and 2TB/s bandwidth to as much as 30 layers and 128TB/s bandwidth—if the necessary packaging, yield, thermal, and interconnect challenges can be solved.
On the NAND side, where 321-layer QLC technology already exists in the market, the roadmap forecasts a path toward 2,000-layer QLC NAND in the years ahead. If achieved, it would represent a major advance in storage density, though it would also demand significant progress in stacking techniques, manufacturing stability, and reliability at scale.
AI semiconductor performance targets are similarly bold. While many current AI chips are measured in the tens of TOPS (trillions of operations per second), the roadmap suggests that within about 15 years, processors could reach around 1,000 TOPS for AI learning (training) and about 100 TOPS for inference, pointing to a future where on-device AI and data center acceleration both continue to expand rapidly.
Overall, the roadmap paints a picture of the semiconductor industry entering a new phase—one where smaller nodes, 3D transistor structures, advanced memory scaling, and AI-focused architectures all develop together. If even part of this vision lands on schedule, the next decade and beyond could redefine what consumers and businesses can expect from smartphones, PCs, servers, storage, and next-generation AI systems.
