Breakthrough 2D-CMOS chip could supercharge future smartphones and wearables
A research team led by Chunsen Liu at Fudan University has built the first fully functional 2D-CMOS chip, successfully integrating atomically thin 2D memory with a conventional silicon processor. Detailed in the journal Nature, this milestone moves 2D materials from lab promise to practical hardware, opening a path to faster, thinner, and far more energy-efficient devices.
For years, chipmakers have been shrinking transistors on silicon, but that approach is pushing against physical limits. One-atom-thick 2D materials offer a compelling alternative thanks to their exceptional electrical properties and ultra-compact size. The challenge has been marrying these fragile layers with mature CMOS technology without sacrificing performance or reliability.
The team’s solution, called Atom2Chip, introduces a full-stack on-chip process that places a monolayer of molybdenum disulfide (MoS2) directly on the rough surface of a CMOS chip. A specialized packaging method protects the delicate atomic film, while a cross-platform interface ensures the 2D circuits communicate seamlessly with the silicon foundation. This isn’t just a concept—it’s a working system.
Instead of a simple proof-of-concept, the researchers produced a 1 Kb 2D NOR flash memory capable of instruction-driven operations. In testing, the chip ran at a 5 MHz clock speed and achieved rapid 20-nanosecond program and erase times with low energy use. That combination of speed and efficiency showcases how 2D materials can boost performance without draining power.
Why this matters
– It bridges 2D materials and mainstream silicon, a long-standing barrier to next-generation chips.
– It demonstrates real, instruction-level functionality, not just isolated components.
– It points toward higher-density, lower-power memory and potentially future processors using similar methods.
How Atom2Chip makes it possible
– On-chip integration of monolayer MoS2 directly onto a finished CMOS surface.
– Protective packaging to stabilize and preserve the atomic-scale layer.
– A cross-platform system that lets 2D circuits plug into established CMOS workflows.
What comes next
While this prototype focuses on data storage, the same integration approach could be extended to computing elements. If scaled, the technology could power ultra-thin smartphones, wearables, and edge devices with faster performance and longer battery life. It’s an early yet meaningful blueprint for the next wave of high-density, energy-efficient memory—and a potential catalyst for future 2D-based processors.
