Samsung and SK hynix may delay hybrid bonding for HBM4 as memory standards loosen
Samsung and SK hynix may not rush to use hybrid bonding in their first HBM4 memory chips, as changing industry standards could make the advanced packaging technology less urgent for the next generation of high-bandwidth memory.
Hybrid bonding has been widely viewed as a key step for future HBM development, especially as AI accelerators and data center GPUs demand faster, denser, and more power-efficient memory. However, a report from Korean media suggests that updated thickness guidelines from the Joint Electron Device Engineering Council, better known as JEDEC, may give memory makers more room to continue using existing bonding methods for HBM4.
The previous expectation was that next-generation HBM stacks would need to stay within a thickness limit of around 900 micrometers. Now, the standard could reportedly be relaxed to 1,000 micrometers for future products. That change may reduce the immediate pressure on Samsung and SK hynix to adopt hybrid bonding for HBM4, potentially pushing the technology’s wider introduction to HBM4E or later HBM generations.
Why hybrid bonding matters for next-generation HBM
High-bandwidth memory is built by stacking multiple DRAM layers on top of each other. As AI chips become more powerful, memory suppliers are trying to increase the number of layers in each stack while maintaining performance, power efficiency, and thermal stability.
Current HBM products typically rely on thermocompression bonding. This process uses micro-bumps and an underfill material between DRAM layers, then applies heat and pressure to bond the stack together. While this approach is well established, it becomes more challenging as memory stacks grow taller and denser.
Hybrid bonding offers a more advanced solution. It directly connects layers without the same reliance on bumps and underfill, allowing for thinner stacks, better electrical connections, and improved heat dissipation. Because underfill can act as a thermal barrier, removing it can help memory chips manage heat more effectively, which is critical for AI servers and high-performance computing systems.
SK hynix had previously been linked to hybrid bonding development, with reports indicating that the company had verified a 12-layer HBM chip using the technology. At the time, expectations suggested that hybrid bonding could enter mass production with HBM4. The latest industry signals, however, point to a more cautious timeline.
Relaxed JEDEC thickness rules could change the HBM4 roadmap
The possible shift comes as JEDEC is said to be reviewing HBM stack thickness standards. Earlier discussions reportedly considered increasing the HBM4 stack thickness range from the current 775 micrometers to between 825 and 900 micrometers. More recent claims suggest that future HBM standards could allow stack thickness to rise from 900 micrometers to 1,000 micrometers.
That extra space matters. If manufacturers can build compliant HBM4 products without needing the thinner stack structure enabled by hybrid bonding, they may choose to rely on proven manufacturing methods for now. This could lower production risk, improve yield stability, and help companies meet customer demand faster.
For Samsung and SK hynix, delaying hybrid bonding may also make business sense if major AI chip customers are not yet pushing aggressively for higher-layer HBM stacks. The report suggests that demand for very tall HBM stacks, such as 16-layer designs, has not yet become active enough to force an immediate transition.
As a result, even HBM4E products may remain at 12 layers if the market does not require larger configurations in the near term.
Samsung and SK hynix may focus on cooling alternatives first
Instead of adopting hybrid bonding immediately, Samsung and SK hynix are reportedly exploring other heat management solutions for HBM4. These may include heat dissipation devices designed to deliver some of the cooling benefits associated with hybrid bonding while allowing manufacturers to keep using more mature bonding techniques.
Thermal performance is becoming one of the most important challenges in HBM development. AI GPUs and accelerators rely heavily on high-speed memory, and as bandwidth increases, heat generation also becomes harder to control. Better cooling can improve reliability and allow chips to maintain performance under heavy workloads.
Hybrid bonding still has a strong long-term role because it improves thermal behavior by eliminating underfill between stacked DRAM layers. However, if cooling devices can provide enough thermal improvement for HBM4, memory makers may prefer to delay the more complex transition until the technology is absolutely necessary.
Hybrid bonding still expected for future HBM generations
Although Samsung and SK hynix may skip hybrid bonding for HBM4, the technology is still expected to become important for later HBM products. As memory stacks gain more input-output terminals and require greater connection density, traditional bonding methods may eventually reach their limits.
The report indicates that hybrid bonding is likely to become necessary for HBM5E, when the number of I/O terminals is expected to grow significantly. At that stage, the benefits of direct bonding, thinner stacks, improved signal integrity, and better heat dissipation could become essential rather than optional.
This means the industry is not abandoning hybrid bonding. Instead, the adoption timeline may simply be shifting. HBM4 could arrive with more conventional bonding technology, HBM4E may still stay conservative depending on customer needs, and HBM5E could become the point where hybrid bonding moves into broader production.
What this means for the AI memory market
The possible delay highlights how quickly the HBM market is evolving. Demand from AI computing has pushed Samsung, SK hynix, and other memory suppliers to accelerate development of faster and denser HBM products. At the same time, manufacturers must balance innovation with yield, cost, production capacity, and customer requirements.
If JEDEC allows thicker HBM stacks, memory makers gain flexibility. They can continue improving HBM performance without immediately taking on the full complexity of hybrid bonding. That could help stabilize HBM4 production and improve supply for AI hardware makers.
However, the long-term trend remains clear. AI servers, machine learning accelerators, and high-performance GPUs will continue to need more bandwidth, larger memory capacity, and better power efficiency. As those requirements rise, advanced packaging technologies like hybrid bonding are expected to become increasingly important.
For now, Samsung and SK hynix may have found a way to extend the life of current HBM manufacturing methods. But as HBM5 and HBM5E move closer, hybrid bonding is likely to return to the center of the conversation.
