China has spent years trying to reduce its dependence on NVIDIA’s CUDA, the software platform widely seen as the key reason NVIDIA dominates AI computing. Now, a new proposal from within China’s semiconductor leadership is gaining attention for taking a different route—one that doesn’t try to “clone” CUDA at all.
Wei Shaojun, an executive with the China Semiconductor Industry Association, has urged Beijing and the domestic AI industry to accelerate development of homegrown alternatives to CUDA and other Western-sourced components. His argument is blunt: even if China’s own technology isn’t competitive at first, it still needs to be used, iterated on, and improved through real-world deployment. Waiting for a perfect solution, he suggests, is a guaranteed way to fall further behind.
Instead of building a direct replacement for CUDA—an approach that would require years of developer adoption, tooling maturity, libraries, and deep ecosystem buy-in—Shaojun points to another strategy: software-defined chips, often shortened to SDCs.
The idea behind a software-defined chip is to shift more “compute intelligence” into software rather than relying on fixed-function hardware layouts. Today, many AI developers default to CUDA because it’s mature, highly optimized, and supported by a vast ecosystem. That choice tends to lock teams into NVIDIA GPUs, because the software stack and the hardware are tightly tied together.
SDCs aim to change that dynamic. Rather than relying on a CUDA-style software layer to translate work onto a GPU architecture, an SDC uses a reconfigurable grid on the chip. The compiler generates a configuration bitstream that effectively “sets up” the chip for the specific workload. In practical terms, this means developers aren’t bound to a specific instruction set architecture in the same way, and the compilation flow can be more flexible than traditional GPU programming models.
Another major distinction is how work is scheduled and executed. GPUs typically rely on dedicated hardware schedulers and a more dynamic execution approach. Software-defined chips, by contrast, are described as using deterministic compilation—where the compiler maps out operations and data movement with extreme precision, tracking behavior down to clock-cycle timing.
Shaojun’s view is that trying to build translation layers and brand-new ecosystems designed to replicate CUDA’s success is simply too costly and slow, especially when the goal is to catch up under geopolitical and supply-chain pressure. However, the SDC route isn’t easy either. Because the compiler becomes central to performance and functionality, the engineering burden shifts heavily into software tooling—introducing complex challenges such as routing, branching, and structural design choices that don’t fit neatly into conventional hardware development.
While software-defined chips have already appeared in the market—often used for specific AI workloads—they are generally positioned as complementary accelerators rather than full GPU replacements. Still, the concept highlights a key point in the global AI chip race: the battle isn’t only about faster silicon. It’s also about developer ecosystems, compilers, and software stacks that decide which hardware the world builds on.
