Micron Unveils Next-Generation DDR6, LPDDR6, HBM, and NAND Roadmap Built for the AI Era
Micron has outlined an ambitious next-generation memory roadmap designed to support the rapid growth of artificial intelligence, data centers, mobile devices, and enterprise computing. The company’s upcoming DRAM, HBM, and NAND technologies promise major improvements in bandwidth, power efficiency, density, and capacity, with products such as DDR6, LPDDR6, advanced HBM, and 1 TB RDIMM modules positioned as key building blocks for future AI systems.
The demand for memory is rising sharply as AI workloads become more complex. According to Micron, each major phase of AI has required significantly more memory than the last. AI inferencing already pushed demand higher, while agentic AI has driven an estimated 30x increase in memory requirements. The next wave, physical AI, is expected to create another major jump, with projected growth of more than 10x.
This shift is forcing memory makers to rethink traditional architectures. AI servers, high-performance computing systems, edge devices, and mobile platforms all need faster access to larger pools of data while using less energy. Micron’s latest roadmap focuses directly on those challenges.
A major part of Micron’s strategy is continued DRAM scaling. Since 1995, the number of bits per DRAM wafer has increased by around 400 times, and Micron has delivered 22 DRAM nodes across that period. The company now plans to move beyond conventional planar scaling and explore more vertical, three-dimensional approaches to memory design.
Micron’s next major DRAM node is 1δ, also known as 1-Delta. This technology follows the company’s 1γ generation and is expected to enter ramp in the second half of 2027. Micron says 1δ will deliver a mid-20% improvement in bit density compared with 1γ while improving cost efficiency and enabling extremely precise angstrom-level process control.
The 1δ generation will also rely on advanced HKMG CMOS technology and new materials. It is being developed for high-performance memory products including HBM5, vertical HBM, vertical edge inference memory, DDR6, and LPDDR6.
Micron is also placing strong emphasis on 6F² DRAM scaling. The company believes this approach offers a more practical path forward than 4F² DRAM, which it sees as too complex and costly for long-term scaling. Future nodes beyond 1δ are expected to incorporate technologies such as wafer bonding, High-NA EUV lithography, and eventually new materials that could help extend DRAM scaling even further.
Looking further ahead, Micron is preparing for 3D DRAM development. Instead of relying only on shrinking cells horizontally, 3D DRAM would build upward by stacking layers. This could become increasingly important as traditional planar cells approach atomic-scale limits.
One of the biggest highlights of Micron’s roadmap is LPDDR6. While LPDDR memory is best known for smartphones and mobile devices, Micron expects LPDDR6 to become increasingly important in data centers as well. The company claims its next-generation LPDDR6 products will deliver more than 35% better power efficiency compared with LPDDR5, with some densities exceeding that improvement.
That efficiency gain matters because AI workloads are highly power-sensitive. As data centers scale to handle larger models and more advanced compute, memory bandwidth and energy consumption become critical bottlenecks. LPDDR6 could help deliver higher bandwidth while keeping power use under control.
DDR6 is another major focus. Micron says its DDR6 memory will offer more than twice the bandwidth of DDR5, making it a major upgrade for future server platforms. This improvement is expected to benefit data centers, enterprise servers, and AI systems that require fast, reliable access to large datasets.
Micron is also pushing capacity higher with next-generation RDIMM modules. After recently discussing 512 GB RDIMM technology, the company now plans to deliver 1 TB RDIMM modules. These ultra-high-capacity modules are aimed at demanding AI workloads, large databases, high-performance computing, and memory-intensive enterprise applications.
HBM, or high-bandwidth memory, is another central part of Micron’s AI strategy. The company is expanding its HBM roadmap across three main paths: standard HBM, custom HBM, and vertical HBM.
Micron already has HBM3E products in production, including 8-high stacks, with 12-high HBM3E shipments planned. HBM4 is expected to follow in 2026, with 36 GB stacks and up to 2.8 TB/s of bandwidth per stack. Micron claims that around 100 of these stacks could provide bandwidth comparable to the scale of global internet traffic.
HBM4E will introduce more customization, including base-die logic options. This means the logic layer underneath the memory stack can be tailored with features such as compute logic or core memory logic. Custom HBM designs can help improve performance, efficiency, and workload-specific optimization for AI accelerators and advanced processors.
Beyond custom HBM, Micron is preparing vertical HBM, or vHBM. This approach stacks memory directly on compute silicon, creating the shortest possible path between memory and processing units. The goal is to increase bandwidth per watt and improve tokens per watt, a key efficiency metric for AI inference and generation workloads.
Micron’s vertical HBM roadmap includes vHBM1 around 2028, with later generations such as vHBM3 planned closer to 2030. The company is also developing vEIM, or vertical edge inference memory, which is designed for highly efficient AI inference. The first generation of vEIM is targeting around 2 TB/s of bandwidth per module while using less than 1 picojoule per bit.
To make these HBM technologies possible, Micron is investing in advanced packaging and interconnect technologies. These include hybrid copper bonding, improved through-silicon vias, smaller microbump pitch, new stacking methods, heat spreaders, and thermally aware design. As memory stacks grow taller and faster, managing heat and maintaining signal integrity become just as important as increasing density.
Hybrid bonding is especially important because it enables much denser connections between chips. As memory bandwidth rises, the spacing between interconnects must shrink. Hybrid bonding provides a path to tighter, faster, and more efficient links between memory layers and logic components.
Micron’s NAND roadmap is also moving forward aggressively. The company’s G9 NAND is currently scaling, and its future G11 NAND is expected to enter volume ramp in the second half of 2027. G11 will use wafer-on-wafer bonding, exceed 400 layers, and feature an industry-leading cell pitch.
Compared with G9 NAND, G11 is expected to provide roughly twice the bit density, up to 1.5 times higher I/O speed, and more than 25% lower energy per data transfer. These improvements are important for SSDs, enterprise storage, AI data pipelines, and systems that need to keep large volumes of data close to compute resources.
Beyond G11, Micron is exploring ultra-dense cell architectures and high-mobility materials. These technologies are expected to support more energy-efficient devices and faster data paths, helping storage keep pace with AI computing demands.
Micron is also working closely with major customers on next-generation memory integration. The company has stated that future LPDDR6 solutions are being developed for data center use, where power-efficient memory bandwidth is becoming essential for advanced AI infrastructure.
Overall, Micron’s roadmap shows a clear push toward memory technologies built specifically for the AI era. DDR6 aims to double server memory bandwidth compared with DDR5. LPDDR6 targets major power savings for both mobile and data center platforms. HBM is evolving from standard stacks to custom and vertical architectures. NAND is advancing toward higher density, faster I/O, and better energy efficiency.
As artificial intelligence expands from cloud training systems to edge inference, robotics, autonomous machines, and physical AI, memory will become one of the most important performance drivers. Micron’s upcoming DRAM, HBM, and NAND technologies are designed to address that need with higher capacity, greater bandwidth, improved efficiency, and more advanced packaging.
With 1δ DRAM, DDR6, LPDDR6, 1 TB RDIMMs, HBM5-class products, vertical HBM, vEIM, and G11 NAND all on the roadmap, Micron is positioning itself to play a major role in the next generation of AI hardware, enterprise computing, and high-performance storage.
