Google is anticipated to continue with a cautious strategy for its upcoming Tensor G4 chipset, envisioned as an evolution of its Tensor G3 predecessor. Previous insights suggested the chipset would retain the same GPU yet introduce newer CPU cores. The Tensor G4 is expected to be at the core of upcoming Google devices, such as the Pixel 9, Pixel 9 Pro, and Pixel Fold 2, all set for release later in the year.
Recently, a Geekbench entry potentially featuring the Tensor G4 surfaced alongside a Google device codenamed “Tokay.” The exact device the chipset is being tested with remains unclear, and considering the possibility of fabricated Geekbench entries, there is a degree of skepticism about the listing’s authenticity. However, details from the Geekbench data indicate that this could, indeed, be a legitimate test, showcasing specifications like an Arm Mali G715 GPU, an octa-core CPU configuration comprising one Cortex X4/X5 core working at 3.1 GHz, three Cortex A7xx cores at 2.6 GHz, and four Cortex A5xx cores clocked at 1.95 GHz, complemented by 8 GB of RAM.
These details are intriguing as they suggest the Tensor G4 has reduced its core count to 8 cores compared to the Tensor G3’s 9 cores, which is not a common trend for sequential chipset upgrades. Additionally, the performance reflected in Geekbench scores reveals the new chip to be underperforming in single-core and multi-core tests compared to the Tensor G3. These lower scores could be due to the chipset being an early sample, not reflecting the final product’s capabilities.
Further information indicates that the Tensor G4 would be produced using Samsung’s 4LPP+ manufacturing process, previously utilized by the Exynos 2400 SoC. Given the competitive performance of this Exynos chipset against other industry leaders like Qualcomm and MediaTek, the performance of the Tensor G4 is of particular interest. For those seeking significant performance enhancements, it seems they may need to wait for the Tensor G5, which is rumored to be developed from scratch by Google using a yet-to-be-revealed TSMC manufacturing node.
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